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Ordering number : EN4430C
CMOS LSI
LC33832P, S, M, PL, SL, ML-70/80/10
256 K (32768 words x 8 bits) Pseudo-SRAM
Overview
The LC33832 series is composed of pseudo static RAM that operates on a single 5 V power supply and is organized as 32768 words x 8 bits. By using memory cells each composed of a single transistor and capacitor, together with peripheral CMOS circuitry, this series achieves ease of use with high density, high speed, and low power dissipation. The LC33832 series can easily accomplish auto-refresh and self-refresh by means of OE/RFSH input. As with asynchronous static RAM, WE input uses a system for incorporating input data at the WE rise, thereby facilitating interfacing with a microcomputer. The LC33832 series features pin compatibility with 256 K static RAM (the LC36256A series), and available packages are the standard 28-pin DIP with widths of 600 mil or 300 mil, and the SOP with a width of 450 mil. CE-only refresh can be accomplished by selecting address 256 (A0 to A7) within 4 ms.
Package Dimensions
unit: mm 3012A-DIP28
[LC33832P, PL]
SANYO: DIP28
Features
* * * * * * * * 32768 words x 8 bits configuration Single 5 V 10% power supply All input and output (I/O) TTL compatible Fast access times and low power dissipation 4 ms refresh using 256 refresh cycle CE-only refresh, auto-refresh, and self-refresh Low-power version: 100 A self-refresh current Package DIP28-pin (600 mil) plastic package: LC33832P, PL DIP28-pin (300 mil) plastic package: LC33832S, SL SOP28-pin (450 mil) plastic package: LC33832M, ML
unit: mm 3133-DIP28
[LC33832S, SL]
SANYO: DIP28
* CE access time/OE access time/Cycle time/Current drain
Parameter CE access time OE access time Cycle time Current drain Operating Standby LC33832P, S, M, PL, SL, ML -70 70 ns 30 ns 115 ns 65 mA -80 80 ns 35 ns 130 ns 60 mA 1 mA/100 A (L version) -10 100 ns 40 ns 160 ns 50 mA
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
22897HA (OT)/52595TH (OT)/N1993JN/40893JN A8-9957, 58, 59, No. 4430-1/9
LC33832P, S, M, PL, SL, ML-70/80/10 unit : mm 3158-SOP28
[LC33832M, ML]
SANYO: SOP28
Block Diagram
No. 4430-2/9
LC33832P, S, M, PL, SL, ML-70/80/10
Pin Assignment
Pin Functions
A0 to A14 WE OE/RFSH CE I/O1 to I/O8 VCC GND Address input Read/Write input Output-enable input/ refresh input Chip-enable input Data input/output Power supply Ground
Functional Logic
CE H L L L H H OE /RFSH H L H H L NP WE X H L H X X A0 to A7 X VX VX VX X X A8 to A14 X VX VX X X X I/O1 to I/O8 HZ OUT IN HZ HZ HZ State Standby Read Write CE-only refresh Self-refresh Auto-refresh
H ...................High-level input of VIN = 6.5 V to VIH (min) L ....................Low-level input of VIN = VIL (max) to -1.0 V X....................High- or low-level input NP.................Negative-polarity pulse input VX................."IN" when CE = L is confirmed, then "X" HZ.................High impedance IN ..................Input state OUT..............Output state
No. 4430-3/9
LC33832P, S, M, PL, SL, ML-70/80/10
Specifications
Absolute Maximum Ratings
Parameter Maximum supply voltage Input voltage Output voltage Allowable power dissipation Output short-circuit current Operating temperature Storage temperature Symbol VCC max VIN VOUT Pd max IOUT Topr Tstg Ratings -1.0 to +7.0 -1.0 to +7.0 -1.0 to +7.0 600 50 0 to +70 -55 to +150 Unit V V V mW mA C C Note 1 1 1 1 1 1 1
Note: 1) Stresses greater than the above listed maximum values may result in damage to the device.
DC Recommended Operating Ranges at Ta = 0 to +70C
Parameter Supply voltage Input high level voltage Input low level voltage Symbol VCC VIH VIL min 4.5 2.4 -1.0 typ 5.0 max 5.5 6.5 +0.8 Unit V V V Note 2 2 2
Note: 2) All voltages are referenced to GND.
DC Electrical Characteristics at Ta = 0 to +70C, VCC = 5V10%
Parameter Symbol Conditions 70ns Operating current ICCA ICCS1 ICCS2 ICCSR IIL IOL VOH VOL Average current during operation Access time 80ns 100ns min max 65 60 50 1 LC33832P, S, M LC33832PL, SL, ML LC33832P, S, M LC33832PL, SL, ML -10 +10 -10 2.4 0.4 1 1 mA 100 mA 100 A +10 A V V A A mA mA 3,4 Unit Note
Standby current 1 Standby current 2
CE = OE/RFSH = VIH CE = OE/RFSH = VCC -0.2V CE = VCC-0.2V, OE/RFSH = 0.2V
Self-refresh current Input leakage current Output leakage current Output high level voltage Output low level voltage
0VVINVCC, pins other than test pin = 0V DOUT disable, 0VVOUTVCC IOUT = -5mA IOUT = 4.2mA
Note: 3) All current values are measured at minimal cycle rate. Since current flows immoderately, cycle times may become longer and shorter than shown here. 4) Dependent on output load. Maximum value is value during free state.
Input/Output Capacitance Characteristics at Ta = 25C, f = 1MHz, VCC = 5V10%
Parameter Input capacitance (A0 to A14) Symbol CIN1 CI/O min max 5 7 10 Unit pF pF pF Test conditions VIN1 = 0 V VIN2 = 0 V VI/O = 0 V
Input capacitance (CE, OE/RFSH, WE) CIN2 Input/output capacitance
Sampling inspections, and not full-lot inspections, are carried out for these parameters.
No. 4430-4/9
LC33832P, S, M, PL, SL, ML-70/80/10 AC Electrical Characteristics at Ta = 0 to +70C, VCC 5V10% (Notes 5, 6, 7, 8, 9)
LC33832P, S, M, PL, SL, ML Parameter Symbol min Random read, write cycle time Read-write cycle time CE pulse width CE precharge time CE access time OE access time CE output enable time OE output enable time WE output enable time CE output disable time OE output disable time WE output disable time OE hold time for CE OE setup time for CE Read command setup time Read command hold time Write pulse width Write command hold time Write command lead time Input data setup time for WE Input data setup time for CE Input data hold time for WE Input data hold time for CE Address setup time for CE Address hold time for CE Auto-refresh cycle time RFSH delay time for CE RFSH pulse width (auto-refresh) RFSH precharge time (auto-refresh) RFSH active CE delay time (auto-refresh) RFSH pulse width (self-refresh) RFSH precharge CE delay time (self-refresh) Refresh time Rise and fall time tRC tRMW tCE tP tCEA tOEA tCLZ tOLZ tWLZ tCHZ tOHZ tWHZ tOHC tOSC tRCS tRCH tWP tWCH tCWL tDSW tDSC tDHW tDHC tASC tAHC tFC tRFD tFAP tFP tFCE tFAS tFRS tREF tT 3 10 0 0 0 0 0 0 10 0 0 55 55 55 30 30 0 0 0 15 115 35 75 30 135 8000 135 4 50 3 8000 20 20 20 115 165 70 10000 35 70 30 10 0 0 0 0 0 0 10 0 0 60 60 60 35 35 0 0 0 20 130 40 80 30 160 8000 160 4 50 3 8000 25 25 25 -70 max min 130 195 80 10000 40 80 35 10 0 0 0 0 0 0 10 0 0 70 70 70 40 40 0 0 0 25 160 50 80 30 190 8000 190 4 50 8000 30 30 30 -80 max min 160 240 100 10000 50 100 40 -10 max ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ms ns 13 13 13 13 13 11 11 11 11 12 12 10 10 10 Unit Note
Continued on next page.
No. 4430-5/9
LC33832P, S, M, PL, SL, ML-70/80/10 Continued from preceding page.
Note : 5) To accomplish internal initialization, CE and OE/RFSH are fixed at VIH for an interval of 1 ms when VCC reaches the specified voltage after power is switched on. 6) Measured at tT = 5 ns. 7) When measuring input signal timing, VIH (min) and VIL (max) are reference levels. 8) Measured using an equivalent of 100 pF and two standard TTL loads. 9) OE/RFSH input functions as output-enable input (OE) when CE = VIL, and as refresh input (RFSH) when CE = VIH. 10) tCHZ, tOHZ, and tWHZ are defined as the time until output enters the open circuit state and the output voltage level becomes immeasurable. 11) As with ordinary static RAM, write data is incorporated at the rise of WE input or CE input, whichever is earlier, and write data is therefore held during tDSW, tDSC, tDHW, or tDHC. 12) Because address input is incorporated at the fall of CE, the address is maintained during tASC or tAHC. 13) Auto-refresh and self-refresh are determined by OE/RFSH pulse width when CE = VIH, and are defined as auto-refresh when below tFAP (max), or as self-refresh when above tFAS (min). In order to activate CE after the completion of each refresh, tFCE must be assured for auto-refresh, or tFRS must be assured for self-refresh.
No. 4430-6/9
LC33832P, S, M, PL, SL, ML-70/80/10
Timing Chart
Read Cycle
Write Cycle
No. 4430-7/9
LC33832P, S, M, PL, SL, ML-70/80/10 Read-Write Cycle
CE-Only Refresh Cycle
No. 4430-8/9
LC33832P, S, M, PL, SL, ML-70/80/10 Auto-Refresh Cycle
Note: A0 to A14, WE: "H" or "L"
Self-Refresh Cycle
Note: A0 to A14, WE: "H" or "L"
s No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property loss. s Anyone purchasing any products described or contained herein for an above-mentioned use shall: Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and expenses associated with such use: Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally. s Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of February, 1997. Specifications and information herein are subject to change without notice. No. 4430-9/9

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